Explainers · Verilog
Claude and Codex compiled a university ranking by Verilog and FPGA courses: what's inside
On October 30, 2026, a breakdown was published on Habr: two models in two days compiled a ranking of a hundred universities of the former USSR and California by 49 criteria from the world of Verilog, FPGA, and ASIC. We examine the mechanics: what was counted, where the data came from, and why the ranking cannot be read as a comparison of universities with each other.
30 Oct 2026
5 min read
